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面向早期前原理图嵌入式系统设计的LLM驱动及数据手册感知自动化硬件兼容性验证

文章背景与核心概要

在嵌入式系统设计的早期阶段（原理图绘制之前），确保各个硬件组件之间的接口兼容性至关重要。传统的验证方法通常依赖于详细的原理图仿真或人工查阅海量的数据手册（Datasheet），不仅效率低下，而且容易遗漏文档级别的接口冲突。针对这一痛点，本文提出了一种全新的、大语言模型（LLM）驱动的自动化硬件兼容性验证框架。

该框架的核心创新在于“模块化任务分解”与“数据手册感知”。它并不采用简单粗暴的“直接上传文档并向LLM提问”的工作流，而是首先构建设备连接的设计图，接着基于面向领域的准则提取所需的工程属性，最后生成用于评估的确定性脚本。这种设计巧妙地避用了LLM在数值计算方面的固有缺陷，仅将其用于信息转换和脚本生成。实验结果表明，在包含34份数据手册的7个嵌入式系统设计测试中，该框架实现了高达97.5%的兼容性验证准确率，同时将输入上下文大小缩减了8.6倍，展现出巨大的工程应用价值与可扩展性。

📋 Summary

This paper introduces a novel, LLM-driven framework designed to verify hardware compatibility during the early, pre-schematic stages of embedded system design. By leveraging component datasheets and high-level connectivity descriptions rather than relying on detailed schematic simulations, the framework successfully identifies documentation-level interface incompatibilities.

Key innovations and findings include: * Modular Task Decomposition: Instead of directly querying large language models (LLMs) with raw documents, the framework constructs a design graph of device connectivity, extracts required engineering properties based on domain-oriented criteria, and generates deterministic scripts for evaluation. * Avoidance of LLM Computation: The LLM is used strictly for information transformation and script generation, completely avoiding error-prone numerical computations by the model. * High Performance: Tested across 7 embedded-system designs spanning 34 datasheets, the framework achieved a 97.5% compatibility-verification accuracy while reducing input context size by 8.6 times compared to conventional "upload-and-query" workflows.

📌 Article Metadata

  • arXiv ID: arXiv:2608.25217 [cs.AI]
  • Subjects: Artificial Intelligence (cs.AI); Systems and Control (eess.SY)
  • Authors: Haotian Qiao, Robert P. Dick
  • Submitted: August 25, 2026
  • DOI: 10.48550/arXiv.2608.25217

📄 Abstract

我们提出了一种面向早期硬件兼容性验证的LLM驱动、数据手册感知框架。该框架能够基于硬件数据手册和高层组件连接描述，识别文档级别的接口不兼容问题。它不需要详细的原理图仿真与实现，因此可在设计早期阶段投入使用。我们认为，值得信赖的LLM辅助设计自动化不应是通过文档直接生成答案，而是通过可追溯的验证阶段来转换工程信息。给定硬件数据手册和高层组件连接描述后，该框架构建了一个捕获设备连接和共享交互域的设计图，仅检索显式、面向领域的验证准则所需的工程属性，并生成用于兼容性评估的确定性脚本。通过将兼容性分析分解为模块化阶段并保留中间结果，该框架减少了上下文开销、提高了透明度与可追溯性、实现了可扩展性，并避免了对LLM数值计算的依赖。在包含34份数据手册的7个嵌入式系统设计评估中，我们的框架实现了97.5%的兼容性验证准确率，与“上传即查询”工作流相比，输入上下文大小减少了8.6倍。这些结果证明了基于规范的LLM辅助硬件兼容性验证在设计早期的可行性，同时也凸显了模块化任务分解、形式化验证准则以及任务感知紧凑上下文构建的必要性与显著优势。

We present an LLM-driven, datasheet-aware framework for early-stage hardware compatibility verification that identifies documentation-level interface incompatibilities based on hardware datasheets and high-level component connectivity descriptions. It does not require, and can therefore be used, before detailed schematic simulation and implementation. We view trustworthy LLM-assisted design automation not as directly generating answers from documents, but as transforming engineering information through traceable verification stages. Given hardware datasheets and high-level component connectivity descriptions, the framework constructs a design graph that captures device connectivity and shared interaction domains, retrieves only the engineering properties required by explicit, domain-oriented verification criteria, and generates deterministic scripts for compatibility evaluation. By decomposing compatibility analysis into modular stages and preserving intermediate results, the framework reduces context overhead, improves transparency and tractability, enables scaling, and avoids reliance on LLMs for numerical computation. Evaluated on seven embedded-system designs comprising 34 datasheets, our framework achieves 97.5% compatibility-verification accuracy and an 8.6 times reduction in input context size compared with "upload-and-query" workflows. These results demonstrate the feasibility of LLM-assisted, specification-based hardware compatibility verification at an early design stage, as well as the need for, and substantial benefits of, modular task decomposition, formalized verification criteria, and task-aware compact context construction.

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